question 3: structural hazards: assume that the architecture has fixes only for structural hazards, and not data hazards or control hazards. for the same mips code as q2, write the complete 5-stage pipeline implementation by (i) resolving structural hazard for memory access only and compute the effective cpi (ii) resolving structural hazard for register access only and compute the effective cpi (iii) resolve both the structural hazards and compute the effective cpi