question 2: pipeline implementation: assume that the architecture has no fixes for any hazards, structural hazards, control hazards or data hazards. for the following mips code, write the complete 5-stage pipeline implementation including stalls or nop wherever necessary and compute the effective cycles per instruction. start: addi $t9, $0, 1 addi $t8, $0, 32 addi $s1, $s0, 1 loop: slt $t0, $s1, $s0 bne $t0, $0, exit lbu $t1, 0($s0) sub $t1, $t1, $t8 sb $t1, 0($s0) add $s0, $s0, $t9 j loop exit: addi $s0, $s1, -1