assume the elements in the risc-v single-cycle datapath and control have the following delays in picoseconds (ignore the delay time through the control unit). element parameter delay (ps) pc clock-to-q tpcq pc 30 multiplexer tmux 25 alu talu 200 data and instruction memory (read or write) tmem 250 register file (read or write) trf 150 plus 4 adder tadd4 70 extend unit text 15 for each of the following two instructions, calculate the total time in ps needed from the moment the clock edge triggers the pc to read the instruction address until the data is ready to be written to its destination (register file or data memory) right before the next clock edge. show all steps of your calculations. note: this is not the tc as in the lecture and hence no need to consider the setup time of the register file or the data memory